Name: digit-serial computation
SKU: 3415142
Price: 6346.00 TWD
Availability: InStock
Author: parhi,hartley
ISBN: 9780792395737

Type

Physical Book

Publisher

Springer

Author

parhi,hartley

Language

English

Pages

320

ISBN

0792395735

ISBN13

9780792395737

Synopsis "digit-serial computation"

the sampling rates for digital signal processing (dsp) in such applications as speech, telephony, mobile radio, video, radar and sonar, ranges from 10 khz to 100 mhz. real-time implementation of such systems requires design of hardware that can process signal samples as these are received from the source, rather than storing them in buffers for batch-mode processing. efficient implementation of dsp hardware demands a study of families of architectures and styles, selecting an appropriate architecture for a specific application. digit-serial computation is proposed as an appropriate design methodology when bit-serial systems cannot meet sampling rate requirements, and where bit-parallel systems require excessive hardware. a family of implementations can be obtained by changing the digit size parameter, allowing an optimum trade-off between throughput and size. digit-serial computation describes the architecture, and the design and layout methods used in parsifal: the silicon compiler developed at gecs corporate r&d laboratory. the structures architecture of digit-serial designs lends itself to automatic compilation from algorithmic descriptions. the book also goes on to discuss wider-ranging issues in digit-serial design in chapters on `folding and `unfolding, as well as in chapters on systolic arrays, canonic-signed-digit number representation and carry-save arithmetic. the book is an excellent source of reference and may be used as a text for an advanced course on the subject.